1. Field of the Invention
This invention relates to a radio communication device using a PLL (phase locked loop) circuit to implement modulation or AFC (automatic frequency control).
2. Description of the Related Art
Some frequency modulators or FSK (frequency shift keying) modulators include a PLL (phase locked loop) using a signal generated by a VCXO (voltage controlled crystal oscillator) as a reference-frequency signal. A modulating signal is inputted into a VCO (voltage controlled oscillator) forming a part of the PLL. The VCO serves to modulate a carrier in accordance with the modulating signal to generate a modulation-resultant signal.
In some cases, for implementing modulation in a wide frequency range from the direct current to several kHz, the VCXO is used to modulate the reference-frequency signal in accordance with the modulating signal. In these cases, there are two modulation paths, that is, a VCO-based modulation path and a VCXO-based modulation path.
For example, Japanese patent application publication number 2000-341046 discloses a frequency modulation (FM) circuit including a VCO-based modulation path and a VCXO-based modulation path.
Many radio communication devices are designed to implement AFC (automatic frequency control) during a reception mode of operation. AFC keeps the related device tuned to a received-signal carrier frequency.
Japanese patent application publication number 2001-237906 discloses a radio receiver including a VCXO for generating a reference-frequency signal that determines a received frequency. The radio receiver implements AFC for enabling the received frequency to follow the frequency of a currently-received base-station signal. Specifically, AFC is implemented by controlling the VCXO in response to a phase error corresponding to a frequency error between the received frequency and the frequency of the base-station signal.
Japanese patent number 3801727 discloses that a frequency converter subjects a received IF signal to frequency conversion responsive to a local oscillator signal to generate a frequency-conversion-resultant signal. A demodulator subjects the frequency-conversion-resultant signal to demodulation to recover transmitted data. The demodulator generates frequency error information and bit error information also. An AFC controller produces corrective information from the frequency error information and the bit error information. The local oscillator signal is generated by a PLL circuit including a fractional frequency division PLL IC. The corrective information controls the fractional frequency division PLL IC to implement AFC for removing the frequency error of the local oscillator signal relative to the received IF signal.
There is a prior-art radio communication device designed so that a frequency for signal transmission or a frequency for signal reception (that is, a selected channel) is set based on a frequency division ratio in a frequency divider forming a part of a PLL, and modulation for signal transmission includes modulation through the use of a VCO forming a part of the PLL and modulation by changing the oscillation frequency of a VCXO which is a reference frequency for the PLL. In addition, AFC during signal reception is implemented by adjusting the oscillation frequency of the VCXO. The prior-art device uses a CPU (central processing unit) for controlling the frequency division ratio in the frequency divider upon change between the signal transmission frequency and the signal reception frequency or change of the signal reception frequency between different channels. Since quick response is required for modulation and AFC, the prior-art device uses a DSP (digital signal processor) to implement modulation and AFC through a DAC (digital-to-analog converter).
Generally, the oscillation frequency of a VCXO tends to vary as the temperature of the VCXO changes or as the VCXO ages. Accordingly, for modulation or AFC using a VCXO, it is not easy to attain sufficient frequency accuracy.
It is conceivable to adjust a frequency division ratio in a frequency divider within a PLL to implement modulation or AFC. In this conceivable case, a TCXO (temperature-compensated crystal oscillator) can be used for generating a reference-frequency signal. Generally, the oscillation frequency of a TCXO which is a reference frequency remains substantially constant as the temperature of the TCXO changes or as the TCXO ages. Preferably, a DSP is used in adjusting the frequency division ratio for modulation or AFC. On the other hand, a CPU is used in controlling the frequency division ratio to change the signal reception frequency or the signal transmission frequency. In this case, when change of the reception signal frequency is requested during the signal reception for which the CPU accesses the frequency divider to set therein frequency setting data to implement AFC, the DSP also accesses the frequency divider to set therein frequency setting data for change of the reception signal frequency. Accordingly, there is a chance that frequency setting data for AFC and frequency setting data for change of the reception signal frequency will collide with each other in the frequency divider.